Switchtec Userspace PROJECT_NUMBER = 4.2
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gasops.c
1/*
2 * Microsemi Switchtec(tm) PCIe Management Library
3 * Copyright (c) 2017, Microsemi Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included
13 * in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
16 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 */
24
25#include "gasops.h"
26#include "switchtec/gas.h"
27#include "../switchtec_priv.h"
28#include "switchtec/utils.h"
29
30#include <errno.h>
31#include <stddef.h>
32#include <string.h>
33#include <unistd.h>
34#include <sys/time.h>
35
36#define gas_reg_read8(dev, reg) __gas_read8(dev, &dev->gas_map->reg)
37#define gas_reg_read16(dev, reg) __gas_read16(dev, &dev->gas_map->reg)
38#define gas_reg_read32(dev, reg) __gas_read32(dev, &dev->gas_map->reg)
39#define gas_reg_read64(dev, reg) __gas_read64(dev, &dev->gas_map->reg)
40
41#define gas_reg_write8(dev, val, reg) __gas_write8(dev, val, \
42 &dev->gas_map->reg)
43#define gas_reg_write16(dev, val, reg) __gas_write16(dev, val, \
44 &dev->gas_map->reg)
45#define gas_reg_write32(dev, val, reg) __gas_write32(dev, val, \
46 &dev->gas_map->reg)
47#define gas_reg_write64(dev, val, reg) __gas_write64(dev, val, \
48 &dev->gas_map->reg)
49
51 int no_retry;
52 int num_subcmd;
53 int *subcmds;
54};
55static int fw_toggle_noretry_subcmds[] = {
56 MRPC_FW_TX_TOGGLE,
57};
58static const struct no_retry_struct gasop_noretry_cmds[] = {
59 [MRPC_SECURITY_CONFIG_SET] = {1, 0, NULL},
60 [MRPC_KMSK_ENTRY_SET] = {1, 0, NULL},
61 [MRPC_SECURE_STATE_SET] = {1, 0, NULL},
62 [MRPC_BOOTUP_RESUME] = {1, 0, NULL},
63 [MRPC_DBG_UNLOCK] = {1, 0, NULL},
64 [MRPC_FW_TX] = {1, 1, fw_toggle_noretry_subcmds},
65 [MRPC_SECURITY_CONFIG_SET_GEN5] = {1, 0, NULL},
66 [MRPC_KMSK_ENTRY_SET_GEN5] = {1, 0, NULL},
67 [MRPC_SECURE_STATE_SET_GEN5] = {1, 0, NULL},
68 [MRPC_BOOTUP_RESUME_GEN5] = {1, 0, NULL},
69 [MRPC_DBG_UNLOCK_GEN5] = {1, 0, NULL},
70 [MRPC_FW_TX_GEN5] = {1, 1, fw_toggle_noretry_subcmds},
71};
72static const int gasop_noretry_cmds_count = sizeof(gasop_noretry_cmds) /
73 sizeof(struct no_retry_struct);
74
75static inline bool gasop_is_no_retry_cmd(uint32_t cmd, int subcmd)
76{
77 int i;
78
79 cmd &= SWITCHTEC_CMD_MASK;
80
81 if (cmd >= gasop_noretry_cmds_count)
82 return 0;
83 if (gasop_noretry_cmds[cmd].no_retry == 0)
84 return 0;
85 if (gasop_noretry_cmds[cmd].num_subcmd == 0)
86 return 1;
87 for (i = 0; i < gasop_noretry_cmds[cmd].num_subcmd; i++) {
88 if (subcmd == gasop_noretry_cmds[cmd].subcmds[i])
89 return 1;
90 }
91
92 return 0;
93}
94
95int gasop_access_check(struct switchtec_dev *dev)
96{
97 uint32_t device_id;
98
99 device_id = gas_reg_read32(dev, sys_info.device_id);
100 if (device_id == -1)
101 return -1;
102 return 0;
103}
104
105void gasop_set_partition_info(struct switchtec_dev *dev)
106{
107 dev->partition = gas_reg_read8(dev, top.partition_id);
108 dev->partition_count = gas_reg_read8(dev, top.partition_count);
109}
110
111int gasop_cmd(struct switchtec_dev *dev, uint32_t cmd,
112 const void *payload, size_t payload_len, void *resp,
113 size_t resp_len)
114{
115 struct mrpc_regs __gas *mrpc = &dev->gas_map->mrpc;
116 int status;
117 int ret;
118 uint8_t subcmd = 0xff;
119
120 __memcpy_to_gas(dev, &mrpc->input_data, payload, payload_len);
121
122 /* Due to the possible unreliable nature of hardware
123 * communication, function __gas_write32() is implemented
124 * with automatic retry.
125 *
126 * This poses a potential issue when a command is critical
127 * and is expected to be sent only once (e.g., command that
128 * adds a KMSK entry to chip OTP memory). Retrying could
129 * cause the command be sent multiple times (and multiple
130 * KMSK entry being added, if unlucky).
131 *
132 * Here we filter out the specific commands and use 'no retry'
133 * version of gas_write32 for these commands.
134 */
135 if (payload)
136 subcmd = *(uint8_t*)payload;
137 if (gasop_is_no_retry_cmd(cmd, subcmd))
138 __gas_write32_no_retry(dev, cmd, &mrpc->cmd);
139 else
140 __gas_write32(dev, cmd, &mrpc->cmd);
141
142 while (1) {
143 usleep(5000);
144
145 status = __gas_read32(dev, &mrpc->status);
146 if (status != SWITCHTEC_MRPC_STATUS_INPROGRESS)
147 break;
148 }
149
150 if (status == SWITCHTEC_MRPC_STATUS_INTERRUPTED) {
151 errno = ENXIO;
152 return -errno;
153 }
154
155 if(status == SWITCHTEC_MRPC_STATUS_ERROR) {
156 errno = __gas_read32(dev, &mrpc->ret_value);
157 return errno;
158 }
159
160 if (status != SWITCHTEC_MRPC_STATUS_DONE) {
161 errno = ENXIO;
162 return -errno;
163 }
164
165 ret = __gas_read32(dev, &mrpc->ret_value);
166 if (ret)
167 errno = ret;
168
169 if(resp)
170 __memcpy_from_gas(dev, resp, &mrpc->output_data, resp_len);
171
172 return ret;
173}
174
175int gasop_get_device_id(struct switchtec_dev *dev)
176{
177 return gas_reg_read32(dev, sys_info.device_id);
178}
179
180int gasop_get_fw_version(struct switchtec_dev *dev, char *buf,
181 size_t buflen)
182{
183 long long ver;
184
185 ver = gas_reg_read32(dev, sys_info.firmware_version);
186 version_to_string(ver, buf, buflen);
187
188 return 0;
189}
190
191int gasop_get_device_version(struct switchtec_dev *dev, int *res)
192{
193 uint32_t dev_ver;
194 dev_ver = gas_reg_read32(dev, sys_info.device_version);
195
196 *res = dev_ver;
197 return 0;
198}
199
200int gasop_pff_to_port(struct switchtec_dev *dev, int pff,
201 int *partition, int *port)
202{
203 int i, part;
204 uint32_t reg;
205 struct part_cfg_regs __gas *pcfg;
206
207 *port = -1;
208
209 for (part = 0; part < dev->partition_count; part++) {
210 pcfg = &dev->gas_map->part_cfg[part];
211 *partition = part;
212
213 reg = __gas_read32(dev, &pcfg->usp_pff_inst_id);
214 if (reg == pff) {
215 *port = 0;
216 return 0;
217 }
218
219 reg = __gas_read32(dev, &pcfg->vep_pff_inst_id);
220 if (reg == pff) {
221 *port = SWITCHTEC_PFF_PORT_VEP;
222 return 0;
223 }
224
225 for (i = 0; i < ARRAY_SIZE(pcfg->dsp_pff_inst_id); i++) {
226 reg = __gas_read32(dev, &pcfg->dsp_pff_inst_id[i]);
227 if (reg != pff)
228 continue;
229
230 *port = i + 1;
231 break;
232 }
233
234 if (*port != -1)
235 return 0;
236 }
237
238 errno = EINVAL;
239 return -EINVAL;
240}
241
242int gasop_port_to_pff(struct switchtec_dev *dev, int partition,
243 int port, int *pff)
244{
245 struct part_cfg_regs __gas *pcfg;
246
247 if (partition < 0) {
248 partition = dev->partition;
249 } else if (partition >= dev->partition_count) {
250 errno = EINVAL;
251 return -errno;
252 }
253
254 pcfg = &dev->gas_map->part_cfg[partition];
255
256 switch (port) {
257 case 0:
258 *pff = __gas_read32(dev, &pcfg->usp_pff_inst_id);
259 break;
260 case SWITCHTEC_PFF_PORT_VEP:
261 *pff = __gas_read32(dev, &pcfg->vep_pff_inst_id);
262 break;
263 default:
264 if (port > ARRAY_SIZE(pcfg->dsp_pff_inst_id)) {
265 errno = EINVAL;
266 return -errno;
267 }
268
269 *pff = __gas_read32(dev, &pcfg->dsp_pff_inst_id[port - 1]);
270 break;
271 }
272
273 return 0;
274}
275
276static void set_fw_info_part(struct switchtec_dev *dev,
277 struct switchtec_fw_image_info *info,
278 struct partition_info __gas *pi)
279{
280 info->part_addr = __gas_read32(dev, &pi->address);
281 info->part_len = __gas_read32(dev, &pi->length);
282}
283
284int gasop_flash_part(struct switchtec_dev *dev,
285 struct switchtec_fw_image_info *info,
286 enum switchtec_fw_image_part_id_gen3 part)
287{
288 struct flash_info_regs __gas *fi = &dev->gas_map->flash_info;
289 struct sys_info_regs __gas *si = &dev->gas_map->sys_info;
290 uint32_t active_addr = -1;
291 int val;
292
293 info->running = false;
294 info->active = false;
295
296 switch (part) {
297 case SWITCHTEC_FW_PART_ID_G3_IMG0:
298 active_addr = __gas_read32(dev, &fi->active_img.address);
299 set_fw_info_part(dev, info, &fi->img0);
300
301 val = __gas_read16(dev, &si->img_running);
302 if (val == SWITCHTEC_IMG0_RUNNING)
303 info->running = true;
304 break;
305
306 case SWITCHTEC_FW_PART_ID_G3_IMG1:
307 active_addr = __gas_read32(dev, &fi->active_img.address);
308 set_fw_info_part(dev, info, &fi->img1);
309
310 val = __gas_read16(dev, &si->img_running);
311 if (val == SWITCHTEC_IMG1_RUNNING)
312 info->running = true;
313 break;
314
315 case SWITCHTEC_FW_PART_ID_G3_DAT0:
316 active_addr = __gas_read32(dev, &fi->active_cfg.address);
317 set_fw_info_part(dev, info, &fi->cfg0);
318
319 val = __gas_read16(dev, &si->cfg_running);
320 if (val == SWITCHTEC_CFG0_RUNNING)
321 info->running = true;
322 break;
323
324 case SWITCHTEC_FW_PART_ID_G3_DAT1:
325 active_addr = __gas_read32(dev, &fi->active_cfg.address);
326 set_fw_info_part(dev, info, &fi->cfg1);
327
328 val = __gas_read16(dev, &si->cfg_running);
329 if (val == SWITCHTEC_CFG1_RUNNING)
330 info->running = true;
331 break;
332
333 case SWITCHTEC_FW_PART_ID_G3_NVLOG:
334 set_fw_info_part(dev, info, &fi->nvlog);
335 break;
336
337 default:
338 return -EINVAL;
339 }
340
341 if (info->part_addr == active_addr)
342 info->active = true;
343
344 return 0;
345}
346
347int gasop_event_summary(struct switchtec_dev *dev,
348 struct switchtec_event_summary *sum)
349{
350 int i;
351 uint32_t reg;
352
353 if (!sum)
354 return 0;
355
356 memset(sum, 0, sizeof(*sum));
357
358 sum->global = gas_reg_read32(dev, sw_event.global_summary);
359 sum->part_bitmap = gas_reg_read64(dev, sw_event.part_event_bitmap);
360
361 for (i = 0; i < dev->partition_count; i++) {
362 reg = gas_reg_read32(dev, part_cfg[i].part_event_summary);
363 sum->part[i] = reg;
364 if (i == dev->partition)
365 sum->local_part = reg;
366 }
367
368 for (i = 0; i < SWITCHTEC_MAX_PFF_CSR; i++) {
369 reg = gas_reg_read16(dev, pff_csr[i].vendor_id);
370 if (reg != MICROSEMI_VENDOR_ID)
371 break;
372
373 sum->pff[i] = gas_reg_read32(dev, pff_csr[i].pff_event_summary);
374 }
375
376 return 0;
377}
378
379static uint32_t __gas *global_ev_reg(struct switchtec_dev *dev,
380 size_t offset, int index)
381{
382 return (void __gas *)&dev->gas_map->sw_event + offset;
383}
384
385static uint32_t __gas *part_ev_reg(struct switchtec_dev *dev,
386 size_t offset, int index)
387{
388 return (void __gas *)&dev->gas_map->part_cfg[index] + offset;
389}
390
391static uint32_t __gas *pff_ev_reg(struct switchtec_dev *dev,
392 size_t offset, int index)
393{
394 return (void __gas *)&dev->gas_map->pff_csr[index] + offset;
395}
396
397#define EV_GLB(i, r)[SWITCHTEC_GLOBAL_EVT_ ## i] = \
398 {offsetof(struct sw_event_regs, r), global_ev_reg}
399#define EV_PAR(i, r)[SWITCHTEC_PART_EVT_ ## i] = \
400 {offsetof(struct part_cfg_regs, r), part_ev_reg}
401#define EV_PFF(i, r)[SWITCHTEC_PFF_EVT_ ## i] = \
402 {offsetof(struct pff_csr_regs, r), pff_ev_reg}
403
404static const struct event_reg {
405 size_t offset;
406 uint32_t __gas *(*map_reg)(struct switchtec_dev *stdev,
407 size_t offset, int index);
408} event_regs[] = {
409 EV_GLB(STACK_ERROR, stack_error_event_hdr),
410 EV_GLB(PPU_ERROR, ppu_error_event_hdr),
411 EV_GLB(ISP_ERROR, isp_error_event_hdr),
412 EV_GLB(SYS_RESET, sys_reset_event_hdr),
413 EV_GLB(FW_EXC, fw_exception_hdr),
414 EV_GLB(FW_NMI, fw_nmi_hdr),
415 EV_GLB(FW_NON_FATAL, fw_non_fatal_hdr),
416 EV_GLB(FW_FATAL, fw_fatal_hdr),
417 EV_GLB(TWI_MRPC_COMP, twi_mrpc_comp_hdr),
418 EV_GLB(TWI_MRPC_COMP_ASYNC, twi_mrpc_comp_async_hdr),
419 EV_GLB(CLI_MRPC_COMP, cli_mrpc_comp_hdr),
420 EV_GLB(CLI_MRPC_COMP_ASYNC, cli_mrpc_comp_async_hdr),
421 EV_GLB(GPIO_INT, gpio_interrupt_hdr),
422 EV_GLB(GFMS, gfms_event_hdr),
423 EV_PAR(PART_RESET, part_reset_hdr),
424 EV_PAR(MRPC_COMP, mrpc_comp_hdr),
425 EV_PAR(MRPC_COMP_ASYNC, mrpc_comp_async_hdr),
426 EV_PAR(DYN_PART_BIND_COMP, dyn_binding_hdr),
427 EV_PFF(AER_IN_P2P, aer_in_p2p_hdr),
428 EV_PFF(AER_IN_VEP, aer_in_vep_hdr),
429 EV_PFF(DPC, dpc_hdr),
430 EV_PFF(CTS, cts_hdr),
431 EV_PFF(UEC, uec_hdr),
432 EV_PFF(HOTPLUG, hotplug_hdr),
433 EV_PFF(IER, ier_hdr),
434 EV_PFF(THRESH, threshold_hdr),
435 EV_PFF(POWER_MGMT, power_mgmt_hdr),
436 EV_PFF(TLP_THROTTLING, tlp_throttling_hdr),
437 EV_PFF(FORCE_SPEED, force_speed_hdr),
438 EV_PFF(CREDIT_TIMEOUT, credit_timeout_hdr),
439 EV_PFF(LINK_STATE, link_state_hdr),
440};
441
442static uint32_t __gas *event_hdr_addr(struct switchtec_dev *dev,
443 enum switchtec_event_id e,
444 int index)
445{
446 size_t off;
447
448 if (e < 0 || e >= SWITCHTEC_MAX_EVENTS)
449 return NULL;
450
451 off = event_regs[e].offset;
452
453 if (event_regs[e].map_reg == part_ev_reg) {
454 if (index < 0)
455 index = dev->partition;
456 else if (index >= dev->partition_count)
457 return NULL;
458 } else if (event_regs[e].map_reg == pff_ev_reg) {
459 if (index < 0 || index >= SWITCHTEC_MAX_PFF_CSR)
460 return NULL;
461 }
462
463 return event_regs[e].map_reg(dev, off, index);
464}
465
466static int event_ctl(struct switchtec_dev *dev, enum switchtec_event_id e,
467 int index, int flags, uint32_t data[5])
468{
469 int i;
470 uint32_t __gas *reg;
471 uint32_t hdr;
472
473 reg = event_hdr_addr(dev, e, index);
474 if (!reg) {
475 errno = EINVAL;
476 return -errno;
477 }
478
479 hdr = __gas_read32(dev, reg);
480 if (data)
481 for (i = 0; i < 5; i++)
482 data[i] = __gas_read32(dev, &reg[i + 1]);
483
484 if (!(flags & SWITCHTEC_EVT_FLAG_CLEAR))
485 hdr &= ~SWITCHTEC_EVENT_CLEAR;
486 if (flags & SWITCHTEC_EVT_FLAG_EN_POLL)
487 hdr |= SWITCHTEC_EVENT_EN_IRQ;
488 if (flags & SWITCHTEC_EVT_FLAG_EN_LOG)
489 hdr |= SWITCHTEC_EVENT_EN_LOG;
490 if (flags & SWITCHTEC_EVT_FLAG_EN_CLI)
491 hdr |= SWITCHTEC_EVENT_EN_CLI;
492 if (flags & SWITCHTEC_EVT_FLAG_EN_FATAL)
493 hdr |= SWITCHTEC_EVENT_FATAL;
494 if (flags & SWITCHTEC_EVT_FLAG_DIS_POLL)
495 hdr &= ~SWITCHTEC_EVENT_EN_IRQ;
496 if (flags & SWITCHTEC_EVT_FLAG_DIS_LOG)
497 hdr &= ~SWITCHTEC_EVENT_EN_LOG;
498 if (flags & SWITCHTEC_EVT_FLAG_DIS_CLI)
499 hdr &= ~SWITCHTEC_EVENT_EN_CLI;
500 if (flags & SWITCHTEC_EVT_FLAG_DIS_FATAL)
501 hdr &= ~SWITCHTEC_EVENT_FATAL;
502
503 if (flags)
504 __gas_write32(dev, hdr, reg);
505
506 return (hdr >> 5) & 0xFF;
507}
508
509int gasop_event_ctl(struct switchtec_dev *dev, enum switchtec_event_id e,
510 int index, int flags, uint32_t data[5])
511{
512 int nr_idxs;
513 int ret = 0;
514
515 if (e >= SWITCHTEC_MAX_EVENTS)
516 goto einval;
517
518 if (index == SWITCHTEC_EVT_IDX_ALL) {
519 if (event_regs[e].map_reg == global_ev_reg)
520 nr_idxs = 1;
521 else if (event_regs[e].map_reg == part_ev_reg)
522 nr_idxs = dev->partition_count;
523 else if (event_regs[e].map_reg == pff_ev_reg)
524 nr_idxs = gas_reg_read8(dev, top.pff_count);
525 else
526 goto einval;
527
528 for (index = 0; index < nr_idxs; index++) {
529 ret = event_ctl(dev, e, index, flags, data);
530 if (ret < 0)
531 return ret;
532 }
533 } else {
534 ret = event_ctl(dev, e, index, flags, data);
535 }
536
537 return ret;
538
539einval:
540 errno = EINVAL;
541 return -errno;
542}
543
544int gasop_event_wait_for(struct switchtec_dev *dev,
545 enum switchtec_event_id e, int index,
546 struct switchtec_event_summary *res,
547 int timeout_ms)
548{
549 struct timeval tv;
550 long long start, now;
551 struct switchtec_event_summary wait_for = {0};
552 int ret;
553
554 ret = switchtec_event_summary_set(&wait_for, e, index);
555 if (ret)
556 return ret;
557
558 ret = switchtec_event_ctl(dev, e, index,
559 SWITCHTEC_EVT_FLAG_CLEAR |
560 SWITCHTEC_EVT_FLAG_EN_POLL,
561 NULL);
562 if (ret < 0)
563 return ret;
564
565 ret = gettimeofday(&tv, NULL);
566 if (ret)
567 return ret;
568
569 now = start = ((tv.tv_sec) * 1000 + tv.tv_usec / 1000);
570
571 while (1) {
572 ret = switchtec_event_check(dev, &wait_for, res);
573 if (ret < 0)
574 return ret;
575
576 if (ret)
577 return 1;
578
579 ret = gettimeofday(&tv, NULL);
580 if (ret)
581 return ret;
582
583 now = ((tv.tv_sec) * 1000 + tv.tv_usec / 1000);
584
585 if (timeout_ms > 0 && now - start >= timeout_ms)
586 return 0;
587
588 usleep(5000);
589 }
590}
GAS Accessor functions.
int switchtec_event_ctl(struct switchtec_dev *dev, enum switchtec_event_id e, int index, int flags, uint32_t data[5])
Enable, disable and clear events or retrieve event data.
Definition platform.c:327
int switchtec_event_summary_set(struct switchtec_event_summary *sum, enum switchtec_event_id e, int index)
Set a bit corresponding to an event in a summary structure.
Definition events.c:175
int switchtec_event_check(struct switchtec_dev *dev, struct switchtec_event_summary *chk, struct switchtec_event_summary *res)
Check if one or more events have occurred.
Definition events.c:297
Event summary bitmaps.
Definition switchtec.h:308
uint64_t part_bitmap
Bitmap of partitions with active events.
Definition switchtec.h:310
uint64_t global
Bitmap of global events.
Definition switchtec.h:309
unsigned part[SWITCHTEC_MAX_PARTS]
Bitmap of events in each partition.
Definition switchtec.h:314
unsigned local_part
Bitmap of events in the local partition.
Definition switchtec.h:311
unsigned pff[SWITCHTEC_MAX_PFF_CSR]
Bitmap of events in each port function.
Definition switchtec.h:317
Information about a firmware image or partition.
Definition switchtec.h:270
size_t part_addr
Address of the partition.
Definition switchtec.h:275
size_t part_len
Length of the partition.
Definition switchtec.h:276
switchtec_event_id
Enumeration of all possible events.
Definition switchtec.h:323